Use advanced package-stacking to fit in more system functions

Tag : IC Tray

The -Ball Stack package assembly is based on technology developedfor the BGA package technology. In the assembly process, the diceare first placed (face-down) onto an elastomer attachment site furnished on the substrate base material and electricallyinterconnected through the slot feature using conventionalwire-bond methodology.
After wire-bonding, the bond cavity is encapsulated to seal off theexposed bond window, which is then followed by the ball attachmentprocess, electrical testing, marking and singulation. Testing ofindividual package units is also possible. However, many companiesthat are processing memory in high volume have found the strip-testprocess more efficient.
Stacking process
In preparation for package-stacking, the base or bottom packagesare first transferred from their carrier-tray to a multiple unitalignment fixture. The actual stacking process begins with thetransfer of the second-layer package to a dip-fluxing station touniformly coat the bottom half of the ball-contact. With fluxapplied, the upper level packages are sequentially placed atop thebase packages and repeated for each package layer before reflowsoldering.
The loaded fixture is transferred to a forced air/gas convectionoven for mass reflow to complete the interlayer solder joining ofall package layers. Because of the relatively thin composite ofelements within each section of the package, the overall height ofthe finished ZBall Stack package is minimized (ultimatelydetermined by the number of packages joined in the stack).
Following a cleaning process and an electrical continuity test ofthe multiple pack age assembly, the Z-Ball Stack packages undergo afinal physical inspection before transfer to partitioned trays forshipping to customer sites.
Board-level assembly
The two-die Z-Ball Stack package was the first member of thisfamily of packages to be qualified and formally evaluated withenvironmental reliability testing, including mechanical, thermaland thermo-mechanical test regimes. Applications that require evengreater stacking configurations have emerged.
The two- and four-layer memory package will likely have thestrongest market appeal. Companies working on more specialized,high-end applications may even consider adapting the greater memorydensity made possible with eight-layer stacking. Memory productswill generally require unique testing, grading, sorting and burn-inbefore the stacking process.
Ultimately, moving pre-packaged parts through all of the variedprocesses is far more efficient than attempting to test bare die,or to assume that all die within a multiple-die single package arefunctional.
Although these examples represent a stacked DRAM configuration, theball-stack process is not exclusively reserved for memoryapplications. OEMs are discovering that any number of functions canbe combined in this format including the mixing of logic, analog and other types of memory (baseband and flash, flash and SRAM or multiple flash-memory devices with a controller).
Package qualification
The test results for the Z-Ball Stack prove that it can furnish apractical low-risk solution for memory and mixed function, or forcombining memory with logic devices. The Z-Ball Stack package hasmet industry-recognized thermal cycling requirements, and passedthe drop and vibration test defined by OEMs.
Reliability experts are concerned that the higher processtemperatures required for lead-free assembly may adversely impactproduct reliability resulting from acute material degradation. Thecombination of materials used for the assembly of the Z-Ball Stackpackage actually buffers the physical stress within the package bycompensating for the CTE mismatch between the silicon die(3ppm/°C) and the laminate-based circuit board structure (15-17ppm/°C).
The primary benefit in multiple- die packaging is the increase incomponent density. The size and weight of the product will bereduced and functionality enhanced. This will be achieved throughthe integration of several device types. Other benefits includedecreased circuit board complexity, improved product qualitythrough higher reliability and reduced risk in getting the productto market. With multiple sourcing of already proven and mature die,time-to-market and cost-of-ownership can be minimized.
Vern Solberg is Senior Appl icat ions Engineer at Tessera Inc.